1. Field of the Invention
This invention relates to method of fabricating a lead frame, and more particularly, to a method of forming solder areas over a lead frame for use in a lead-frame-based chip scaling package (CSP) through deposition of an oxidation layer rather than selective removal of a polyimide-made solder mask, which allows the fabrication of the lead frame to be carried out in a more cost-effective and advantageous manner.
2. Description of Related Art
A chip-scale package (CSP) is an IC package configuration whose overall size would be only slightly greater than the semiconductor die or dies packed therein. A CSP configuration that is based on a lead frame for die attachment is customarily referred to as a lead-frame-based CSP (customarily abbreviated as L/F-based CSP).
In the fabrication of a CSP lead frame, it is required to define wire-bonding areas and mount solder balls at preselected areas on the CSP lead frame. Conventionally, various methods have been proposed for this purpose, such as the U.S. Pat. No. 5,847,455 entitled xe2x80x9cMOLDED LEADFRAME BALL GRID ARRAYxe2x80x9d proposed by Manteghi. In this patent, a solder mask is disposed over the bottom of a lead frame so as to form selective solder areas, and then solder balls are attached to the selective solder areas. This patented technology is briefly depicted in the following with reference to FIGS. 1A-1C.
Referring first to FIG. 1A, in the first step, a lead frame 10 is prepared. Next, a solder mask 20 is coated, typically from polyimide, over the entire top surface of the lead frame 10.
Referring further to FIG. 1B, in the next step, a selective exposure-development process is performed on a selected portion of the solder mask 20 where a solder-ball opening is defined (in practice, a plurality of solder-ball openings are defined in the solder mask 20, but for simplification of drawing and description, only one is demonstratively shown in FIG. 1B). Next, an etching process is performed to etch away the exposed and developed portion of the solder mask 20, with the left-behind void portion serving as a solder-ball opening 21.
Referring next to FIG. 1C, in the subsequent step, a Pd/Ni (palladium/nickel) layer 30 is formed over the lead frame area confined by the solder-ball opening 21 to a thickness below the top surface of the solder mask 20. This makes the lead frame area where the Pd/Ni layer 30 is deposited become a solder area on the lead frame 10.
The subsequent steps to finish the fabrication of the CSP lead frame includes dry-film lamination, selective exposure and development of the dry film, and etching of the exposed and developed portions of the dry film to define copper lead traces on the lead frame.
The foregoing conventional method, however, has the following drawbacks.
First, it involves the use of etching process and would be unsuitable to employ stamping process in the fabrication, which would make the overall manufacture process more complex and thus costly to implement. Stamping process is unsuitable to employ because it would easily cause the solder mask 20 to be subjected to cracking and uneven coating.
Second, the solder mask 20 is still considered relatively weak in chemical bonding strength with the lead frame 10, so that the overall CSP configuration is considered not highly securely assembled.
Third, the solder mask 20 is relatively high in moisture absorbability, which would make the CSP configuration more likely to be weakened in structural strength by moisture
It is therefore an objective of this invention to provide a method of forming solder areas over a lead frame, which allows the fabrication of the lead frame to be carried out through stamping rather than etching so as to reduce manufacture cost.
It is another objective of this invention to provide a method of forming solder areas over a lead frame, which would allow the overall integrated circuit package to be more securely assembled.
It is still another objective of this invention to provide a method of forming solder areas over a lead frame, which can make the integrated circuit package less likely to be weakened in structural strength by moisture.
In accordance with the foregoing and other objectives, the invention proposes a new method for forming solder areas over a lead frame.
The method of the invention includes the following procedural steps: (1) preparing an electrically-conductive piece; (2) stamping the electrically-conductive piece into a pre-designed lead frame shape; (3) attaching an electrically-insulating covering to a selected portion of the lead frame where a solder-ball opening is defined; (4) depositing an oxidation layer over the uncovered portion of the lead frame that is uncovered by the electrically-insulating covering; (5) removing the electrically-insulating covering, with the left-behind void portion serving as a solder-ball opening in the oxidation layer; and (6) plating an alloy layer over the lead frame area confined by the solder-ball opening in the oxidation layer, with the plated alloy layer serving as the intended solder area.
The foregoing method of the invention is characterized in the use of deposition of an oxidation layer in lieu of selective removal of a polyimide-made solder mask for the defining and forming of solder-ball openings where solder balls are to be formed. Compared to the prior art, the invention has the following advantages. First, the oxidation layer is greater in rigidity than the polyimide-made solder mask, so that it would be less easily subjected to cracking. Second, the oxidation layer is greater in chemical bonding strength with the lead frame than the polyimide-made solder mask, so that it can make the overall CSP configuration more securely assembled. Third, the oxidation layer is lower in moisture-absorbability than the polyimide-made solder mask, so that it can make the overall CSP configuration less likely to be weakened in structural strength by moisture. Overall speaking, the method of the invention is more advantageous to use than the prior art.